Watchdog timer

Excavating

Patent

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Details

364200, 371 12, G06F 1100

Patent

active

046270604

ABSTRACT:
A self-checking timer usable with a host system includes a clock and a plurality of interconnected counters. During a power-up phase the timer generates a system reset signal and counts the counters in a predetermined sequence. A flip-flop is set and reset during the power-up phase and inhibits generation of the system reset signal. During a normal operating phase, the timer generates a test signal that must be responded to by the host system to continuously inhibit generation of the system reset signal.

REFERENCES:
patent: 4227798 (1980-10-01), Steiner
patent: 4410991 (1983-10-01), Lenart
patent: 4429366 (1984-01-01), Kennon
patent: 4513417 (1985-04-01), Lamb et al.
patent: 4551841 (1985-11-01), Fujita et al.

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