Patent
1996-03-19
1998-03-24
Hafiz, Tariq R.
395 54, 395 61, 395900, G06G 700
Patent
active
057321914
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is directed to a method and apparatus for rule evaluation in a fuzzy inference processor operating on fuzzified input values using a plurality of rules.
2. Description of the Prior Art
In the processing of fuzzified input values in a fuzzy inference processor, for the ultimate purpose of producing defuzzified output values, it is known to employ a plurality of rules. Each individual rule has a condition part defining a partial condition for each input variable as well as a consequence part having an allocation of a linguistic value for the respective output variable. The object of a rule evaluation is, in general, to verify whether the partial conditions of each rule are fulfilled for all the individual input variables and, in accordance with a respective rule, assigning a specific linguistic value to the output variables.
SUMMARY OF THE INVENTION
An object of the invention is, to provide a method and an apparatus for accelerated rule evaluation in a fuzzy inference processor.
The above object is achieved in a method and apparatus in accordance with the invention, used in a fuzzy processor operating on fuzzified input values using a plurality of rules, each rule comprising at least one rule segment and each rule segment having a rule segment word associated therewith, and each rule segment word containing linguistic values for an input variable in a condition part of the rule comprising that rule segment word, the rule segment words being stored in a knowledge base memory respectively at absolute addresses. The method and apparatus for accelerated rule evaluation identify which, if any, of the rule segments in each rule is fulfilled by each input variable. To this end, in a first step, a relative address is generated associated with a particular input variable, for subsequent use in addressing that input variable in the knowledge base memory. Also in the first step, a maximum input pointer of a preceding input variable (since, for the first input variable, no value for the "preceding" input variable exists) is set equal to a total number of the rule segment words, and the respective cells of an address memory are loaded with the relative addresses for all of the rule segment words.
In a second step, each of an input pointer and an output pointer for the address memory are set for addressing a first cell in the address memory.
In a third step, a relative address for addressing a rule word segment (referred to below as the "addressed rule word segment" is read out from the cell of the address memory currently addressed by the output pointer, and the output pointer is then incremented by one cell of the address memory.
In a fourth step, the absolute address for the addressed rule word segment is formed from its relative address, a start address, and a relative start address of the knowledge base memory.
In a fifth step, if the input variable in question fulfills at least one condition defined by the addressed rule word segment, the relative address of the addressed rule word segment is written back into the address memory in the cell currently addressed by the input pointer, and the input pointer is then incremented by one cell of the address memory.
In a sixth step, steps 2 through 5 are repeated until the output pointer reaches the value of the maximum input pointer, and the value of the maximum input pointer is then set equal to the current value of the input pointer. Also in this step, the relative address generated in the first step in incremented so as to address a next input variable.
Steps 2 through 6 are then repeated until all input variables are addressed (processed).
DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block circuit diagram showing an apparatus for accelerated rule evaluation, constructed and operating in accordance with the principles of the present invention, in the context of other units of a fuzzy inference processor.
FIG. 2 is a representation showing the correlation of the plurality of rules and the plural
REFERENCES:
patent: 5263125 (1993-11-01), Viot et al.
"Architecture of a CMOS Fuzzy Logic Controller With Optimized Memory Organization and Operator Design," Eichfeld et al., IEEE Int. Conf. on Fuzzy Systems, Mar. 8-12, 1992, pp. 1317-1323.
"A Fuzzy Inference Coprocessor Using a Flexible Active-Rule-Driven Architecture," Ikeda et al., IEEE Int. Conf. on Fuzzy Systems, Mar. 8-12, 1992, San Diego, CA, pp. 537-544.
H. Ikeda et al. "A Fuzzy Inference Coprocessor Using a Flexible Active-Rule-Driven Architecture" IEEE International Conference on Fuzzy Systems. Mar. 8-12, 1992. San Diego, CA pp. 537-544, Mar. 1992.
Hentschel Klaus
Kunemund Thomas
Hafiz Tariq R.
Rhodes Jason W.
Siemens Aktiengesellschaft
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