Digital data buffering device

Coded data generation or conversion – Digital code to digital code converters – Data rate conversion

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Details

327113, H03M 700

Patent

active

057317704

ABSTRACT:
When digital audio data is input, the data is temporarily stored in a ring buffer memory. A clock generator adjusts an output transfer clock cycle so that the difference between the count of an address counter for writing data and the count of an address counter for reading data always falls within a predetermined range. An input rate calculating circuit calculates an average transfer rate at which the input data is transferred. The clock generator increases or decreases the transfer rate of the output data so that the average transfer rate of the output data becomes equal to the average transfer rate of the input data. Consequently, a fluctuation of the transfer rate of the output data is prevented, and thus deterioration of the quality of output signals of digital data is prevented. Moreover, reproduction of output signals becomes available with the use of a synchronous sampling rate converter.

REFERENCES:
patent: 4020332 (1977-04-01), Crochiere
patent: 5101369 (1992-03-01), Torii et al.
patent: 5446398 (1995-08-01), Iwata
patent: 5457456 (1995-10-01), Norsworthy
patent: 5513209 (1996-04-01), Holm
patent: 5519395 (1996-05-01), Buchler et al.

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