Methods of manufacturing carrier supports for integrated chips a

Details Methods of manufacturing carrier supports for integrated chips a Methods of manufacturing carrier supports for integrated chips a

1976-04-27

1977-08-02

Larson, Lowell A.

Metal working

Method of mechanical manufacture

Electrical device making

29628, 29590, 427 96, H01R 900

Patent

active

040387445

ABSTRACT:
A method of fabricating a carrier support for integrated circuit chips to be mounted subsequently on a substrate. A flexible strip of an inextensible insulating material is provided with equidistant openings in the center of each of which a chip is to be mounted. One of the faces of this strip is covered with a conductive film, the said film is cut away to form in each opening interface conductors which overhang towards the center of the opening. Before the conductive film is cut away, the film is coated with a layer of photosensitive lacquer which is partly removed to enable the film to be laid bare in regions which, in each opening, form part of an open-centered zone which surrounds that portion of the film in which the free inner ends of the interface conductors associated with this opening are to be produced. The bared regions in this opening either consist of the whole of the said open-centered zone or else consist of those portions of the zone which are located at least at the points where the said zone is crossed by the outlines of the future interface conductors associated with this opening. A layer of synthetic resin electrodeposited on the bared regions of the film and thereafter the remaining portions of the photosensitive lacquer are removed, as a result of which there is no danger of the interface conductors resulting from the film being cut away causing short circuits when, after the chips have been mounted on their free inner ends, the conductors are cut at a short distance from the edges of each chip so that they may finally be soldered to the said substrate.

REFERENCES:
patent: 3868724 (1975-02-01), Perrino
IBM Technical Disclosure Bulletin, vol. 13, No. 7, Dec. 1970, p. 2099.

Affiliated with

Also associated with

Rating

Methods of manufacturing carrier supports for integrated chips a does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of manufacturing carrier supports for integrated chips a, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of manufacturing carrier supports for integrated chips a will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2291886