Arithmetic unit

Details Arithmetic unit Arithmetic unit

1997-02-28

1999-07-13

Kemper, Melanie A.

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

324141, G01R 1925, G01R 21133

Patent

active

059240504

ABSTRACT:
First and second 1-bit A/D converters convert respective input voltages being in direct proportion to voltage and current of a measurement system into respective 1 bit codes. First and second up-down counters whose up/down count in respective clock terminals are controlled in accordance with respective 1 bit codes which are output from the first and second 1-bit A/D converters, and output A/D converted values of the respective input voltages. A latch holds data one clock prior to currently input data and outputs the data. An adder-subtractor adds and subtracts respective output data of the first and second up-down counters and a numerical value 1 to and from output data of the latch under control of respective output data of the first and second 1-bit A/D converters and an exclusive OR value of the respective output data and outputs arithmetic data which being in proportion to a product of the respective input voltages to the latch. An adder integrates the output data of the latch.

REFERENCES:
patent: 4255707 (1981-03-01), Miller
patent: 4999799 (1991-03-01), Tufts
patent: 5099195 (1992-03-01), Greer et al.
patent: 5448747 (1995-09-01), Garverick et al.

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