Communications: electrical – Digital comparator systems
Patent
1979-04-02
1980-12-09
Boudreau, Leo H.
Communications: electrical
Digital comparator systems
250561, 356375, 358101, 364490, 364559, G06F 1546, H05K 1300
Patent
active
042387809
ABSTRACT:
The position of semiconductor elements is recognized automatically by opto-electronic, non-contact techniques. Recognition of the position of the semiconductor elements, such as integrated circuits, is largely independent of pattern and surface properties, in particular for adjustment purposes in automatic wire assembly and in the transfer of semiconductor elements to automatic alloying/adhesive equipment. The positions of the semiconductor elements are determined via a rectilinear cut edge or system edge by means of a row-by-row scanning which leads from the surroundings of an element and moves across the element, with the rows running parallel or virtually parallel to the direction of the rectilinear edge. The instantaneous intensities of the brightness values are integrated row-wise or row-section-wise, the resulting values are stored and the difference of the results of consecutive rows is formed. Then, only the polarity which corresponds to the investigated edge is used for further analysis. The result is weighted with a factor which corresponds to the roughness of the particular position in the image. The differences in a rough zone are distinctly weakened and differences in a smooth zone are distinctly emphasized, and by means of an additional electronic width evaluation, sharp-edged lines are emphasized in relation to wide junctions so that, on this basis, by means of row counting, a signal for correcting the position of the chip is formed and is output in order to correct the position.
REFERENCES:
patent: 3565532 (1971-02-01), Heitmann et al.
patent: 3670153 (1972-06-01), Rempert et al.
patent: 3814845 (1974-06-01), Hurlbrink et al.
patent: 3898617 (1975-08-01), Kashioka et al.
patent: 3899634 (1975-08-01), Montone et al.
patent: 3903363 (1975-09-01), Montone et al.
patent: 3907439 (1975-09-01), Zanoni
patent: 3955072 (1976-05-01), Johannsmeier et al.
patent: 4021778 (1977-05-01), Ueda et al.
patent: 4057845 (1977-11-01), Ejiri et al.
patent: 4091394 (1978-05-01), Kashioka et al.
patent: 4103998 (1978-08-01), Nakazawa et al.
patent: 4105925 (1978-08-01), Rossol et al.
patent: 4115761 (1978-09-01), Ueda et al.
patent: 4115762 (1978-09-01), Akiyama et al.
patent: 4163212 (1979-07-01), Buerger et al.
patent: 4186412 (1980-01-01), Arimura
Boudreau Leo H.
Siemens Aktiengesellschaft
LandOfFree
Process and an apparatus for automatically recognizing the posit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process and an apparatus for automatically recognizing the posit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process and an apparatus for automatically recognizing the posit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2283572