Method of making static induction transistor logic

Metal treatment – Compositions – Heat treating

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357 22, 357 23, 357 91, H01L 2978, H01L 2980

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042160294

ABSTRACT:
A method of fabricating a static induction transistor device comprising providing a semiconductor substrate having a high impurity concentration, and forming a low impurity concentration semiconductor layer of the same conductivity type as the substrate on a surface of the substrate. Next, a high impurity concentration semiconductor region of the same conductivity type as the substrate is formed in a surface of the semiconductor layer formed on the substrate to define a drain region of the device. An ion implanted semiconductor region having a high impurity concentration and a conductivity type opposite the substrate is formed in the semiconductor layer and concentric with the drain region, beneath the surface of the semiconductor layer, and the ion implanted region is diffused within the semiconductor region to form a semiconductor region having a high impurity concentration in the semiconductor layer and of a conductivity type opposite the semiconductor layer and surrounding the drain region at the surface of the semiconductor layer and having a tubelike shape extending downward into the semiconductor region toward the source region of the device.

REFERENCES:
patent: 4045251 (1977-08-01), Graul et al.
patent: 4115793 (1978-09-01), Nishizawa
Reddi et al., "Ion-Implantation for . . . Si Devices . . .", Solid St. Techn., Oct. 1972, 35.
Lee et al., "Ion-Implanted S/C Devices", Proc. IEEE, 62, (1974), 1241.
Allen, ". . . Implantation Profile Control", Electronics Letts., (Mar. 1969), 111.
Nishizawa et al., "Field-Effect Transistors . . . ", IEEE Trans.-vol. ED22 (1975), p. 185.

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