Semiconductor memory with reduced size ECC circuit

Details Semiconductor memory with reduced size ECC circuit Semiconductor memory with reduced size ECC circuit

1986-08-06

1988-10-25

Atkinson, Charles E.

Excavating

G06F 1110

Patent

active

047808756

ABSTRACT:
A semiconductor memory incorporating an ECC circuit includes a memory array, means for selecting a plurality of bits which are to be simultaneously output to the outside of the IC from a plurality of bits which are simultaneously read out from the memory array, and an error correcting circuit which constitutes the ECC circuit. The selecting means is provided in a stage previous to the error correcting circuit. In consequence, it is possible to reduce the number of bits of a signal which need to be simultaneously processed by the error correcting circuit. Accordingly, the size of the ECC circuit can be reduced.

REFERENCES:
patent: 3423729 (1969-01-01), Heller
patent: 4206440 (1980-06-01), Doi et al.
patent: 4562578 (1985-12-01), Odaka et al.
patent: 4631725 (1986-12-01), Takamura et al.
patent: 4641309 (1987-02-01), Nakano et al.
Franco, Coding for Error-Free Communications, Electro-Technology, Jan. 1968, pp. 53-62.

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