Semaphore circuit for shared memory cells

Details Semaphore circuit for shared memory cells Semaphore circuit for shared memory cells

1986-09-17

1988-10-25

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1314

Patent

active

047808225

ABSTRACT:
A semaphore circuit is disclosed which employs a pair of storage elements; an arbitrator, which is driven by the storage elements; and another pair of storage elements, which are driven by the arbitrator. The arbitrator includes a first and a second NOR gate. One of the inputs of the first NOR gate is connected to the output of the second NOR gate one of the inputs of which is connected to the output of the first NOR gate.

REFERENCES:
patent: 4096572 (1978-06-01), Namimoto
patent: 4115851 (1978-09-01), Nagano et al.
patent: 4214305 (1980-07-01), Tokita et al.
patent: 4380798 (1983-04-01), Shannon et al.
patent: 4594657 (1986-06-01), Byrns
Dijkstra, E. W., "The Structure of the The -Multiprogramming System", Comm. of the ACM, vol. 11, No. 5, May, 1968, pp. 341-346.

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