Fishing – trapping – and vermin destroying
Patent
1992-07-15
1993-08-03
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 47, 437193, 437918, 148DIG136, 257350, 257380, H01L 2170, H01L 2700
Patent
active
052328651
ABSTRACT:
A method for fabricating a high value, vertically integrated resistor begins with an integrated circuit having an unpassivated upper surface that includes designated circuit nodes to be placed in series with the vertical resistor. A layer of passivating material such as boro-phospho silicate glass is deposited on the upper surface of the integrated circuit. Polysilicon vias are formed that extend through the passivating layer and form an electrical ohmic contact with each designated circuit node. The polysilicon vias are subsequently ion implanted with oxygen or nitrogen to increase the resistance thereof to the final desired resistance, which can be greater than 100 megohms, and as much as a gigohm or a terohm. Finally, the vertical resistor is contacted with a metal layer formed on the surface of the passivating layer.
REFERENCES:
patent: 4406051 (1983-09-01), Iisuka
patent: 4727045 (1988-02-01), Cheung et al.
patent: 4755865 (1988-07-01), Wilson et al.
patent: 5159430 (1992-10-01), Manning et al.
"A Novel Scaled-Down Oxygen-Implanted Polysilicon Resistor for Future Static RAM's [sic: RAMs]", R. Saito, et al, IEEE Transactions on Electron Devices vol. 35, No. 3, pp. 298-301, Mar. 1988.
"Thyristors with Polysilicon Shunt Resistors", R. A. Duclos, et al, RCA Technical Notes, No. 1365, Mar. 21, 1985.
"Oxygen Implantation for Polysilicon TCR Optimization", C. H. Lee, IBM Technical Disclosure Bulletin, vol. 24, No. 4, Sep. 1981.
"Oxygen effect on the electrical characteristics of polycrystalline silicon films", R. Angelucci, et al, Appl. Phys. Lett., vol. 39, No. 4, Aug. 15, 1981.
"An Advanced MOS-IC Process Technology Using Local Oxidation of Oxygen-Doped Polysilicon Films", T. Yamaguchi, et al, IEEE Journal of Solid-State Circuits, vol. SC-13, No. 4, Aug., 1978.
"A Wide Range Linear Variable Resistor by Buried Channel MOS/SIMOX", M. Akiya, IEEE Journal of Solid-State Circuits, vol. SC-19, No. 4, Aug. 1984.
Lee Roger
Manning Monte
Bachand William R.
Chaudhuri Olik
Micro)n Technology, Inc.
Tsai H. Jey
LandOfFree
Method of fabricating vertically integrated oxygen-implanted pol does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating vertically integrated oxygen-implanted pol, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating vertically integrated oxygen-implanted pol will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2269987