Test method for semiconductor device

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371 27, H04B 1700

Patent

active

056732740

ABSTRACT:
Disclosed is a test method of a semiconductor device having a processor, a plurality of functional blocks to be tested, and a memory for storing test data used for testing the functional blocks and test results, comprising a step for placing the semiconductor device in a test mode, a step for providing the test data from the memory to the functional blocks under the control of the processor in accordance with programmed instructions, a step for executing the test operation for the functional blocks under the control of the processor in accordance with the programmed instructions, a step for transferring the test results from the functional blocks to the memory under the control of the processor in accordance with the programmed instructions, a step for placing the semiconductor device in a normal operation mode; and a step for analyzing the test results under the control of the processor in accordance with the programmed instructions.

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