Charge pump circuit having a boosted output signal

Details Charge pump circuit having a boosted output signal Charge pump circuit having a boosted output signal

1988-08-04

1990-06-19

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072961, 307304, H03K 3354, H01L 1900, H01L 2704, H01L 2994

Patent

active

049356445

ABSTRACT:
A semiconductor integrated circuit device is provided which comprises a first charge pumping circuit comprising a plurality of MOS transistors cascade-connected between an input voltage node and a booster output node, where, of all associated nodes, those odd-numbered nodes receive one of first and second clock signals through a corresponding capacitor and those even-numbered nodes receive the other clock signal through a corresponding capacitor, a second charge pumping circuit comprising a plurality of MOS transistors cascade-connected between the input voltage node and the booster output node and equal in number to those of the first charge pumping circuit where, of all associated nodes, those odd-numbered nodes receive one of first and second clock signals through a corresponding capacitor and those even-numbered nodes receive the other clock signal through a corresponding capacitor and the gates of the respective MOS transistors are connected to the gate of the corresponding MOS transistors, and a high resistive element connected to an output terminal of said first charge pumping circuit.

REFERENCES:
patent: 4214174 (1980-07-01), Dickson
patent: 4388537 (1983-06-01), Kanuma
patent: 4621315 (1986-11-01), Vaughn et al.
patent: 4701637 (1987-10-01), Piro
patent: 4733108 (1988-03-01), Truong
patent: 4739191 (1988-04-01), Puar
"Charge Pump Circuit For a CMOS Substrate Generator", IBM Tech. Discl. Bull., vol. 29, No. 1, pp. 187-188, Jun. 1986.
J. McCreary et al., "Techniques for a 5-V-Only 64K EPROM Based Upon Substrate Hot-Electron Injection," IEEE Journal of Solid-State Circuits, vol. sc-19, No. 1, pp. 135-143.
J. Drori et al., "A Single 5V Supply Nonvolatile Static RAM," 1981, IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 148-149.

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