Methods of programming, erasing and reading a flash memory

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518529, 36518517, G11C 1604

Patent

active

061308390

ABSTRACT:
A flash memory comprises a plurality of word lines, a plurality of source lines and a plurality of bit lines, the word lines are arranged in a matrix with the bit lines and the source lines, respectively. Between every two adjacent bit line and source line and on every word line there forms a memory cell. Each bit line and source line are coupled to memory cells of two columns. During the procedure of "erase", two columns of memory cells can be erased at the same time. Methods of programming, erasing and reading the flash memory are much easy and controllable.

REFERENCES:
patent: 5654917 (1997-08-01), Ogura et al.
patent: 5745417 (1998-04-01), Kabayashi et al.
patent: 5831894 (1998-11-01), Chang
patent: 6009013 (1999-12-01), Van Houdt et al.

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