Method of fabricating solar cell with integrated interconnect

Fishing – trapping – and vermin destroying

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136244, 136256, H01L 3118, H01L 3105

Patent

active

051008084

ABSTRACT:
A pattern of current collection gridlines (24) is formed on a surface (20) of a photovoltaic wafer (12). An ohmic contact strip (28) is formed adjacent to an edge (12c) of the wafer (12) in electrical interconnection with the gridlines (24). Interconnect tabs (30) are integrally formed with the gridlines (24) and contact strip (28), extending away from the contact strip (28) external of the edge (12c) for series or parallel interconnection with other solar cells. The interconnect tabs (30) may have a stress reflief configuration, including a non-planar bend or loop. The wafer (12) initially has a first portion (12a) and a second portion (12b). A barrier layer (50) of photoresist or the like is formed on the second portion (12b). The grid (24) and contact strip (28) are formed on the first portion (12a) simultaneously with forming the interconnect tabs (30) over the barrier layer (50 ) on the second portion (12b) using photolithography and metal deposition. The barrier layer (50) is dissolved away, and the second portion (12b) is broken away from the first portion (12a), leaving the interconnect tabs (30) extending from the contact strip (28) external of the remaining first portion (12a) of the wafer (12).

REFERENCES:
patent: 3411952 (1968-11-01), Ross et al.
patent: 5045481 (1991-09-01), Schilling et al.

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