Semiconductor device having a basic cell region and an I/O cell

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections

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257207, 257210, 257528, 257532, 257533, H01L 2710

Patent

active

054019893

ABSTRACT:
A signal line is disposed to run parallel to electric-power supplying lines in the uppermost layer of a multi-layer wiring in an ASCI (Application-oriented Specific IC). An arbitrary cell in an I/O cell column can be interconnected to a large-size circuit element, such as a feedback resistor, formed at a corner of a semiconductor chip. Therefore, a desired function circuit block can be formed in an I/O cell corresponding to an arbitrary input/output pin so that satisfactory freedom is assured for a user who design the pattern on a printed circuit board. Since the signal line is formed by an individual conductive layer from that for the signal line and as well as it runs adjacently to the electric-power line, inductive coupling with other signal lines can significantly be reduced. As a result, a stable operation of an oscillation circuit constituted by the feedback resistor and a selected internal I/O cell can be assured. According to the present invention, the necessity of an additional conductive layer to be formed in the multi-layer wiring can be eliminated. Therefore, increase in the number of manufacturing processes and the overall cost can, of course, be prevented.

REFERENCES:
patent: 4575744 (1986-03-01), Caldwell et al.
patent: 4746966 (1988-05-01), Fitzgerald et al.
patent: 5248956 (1993-09-01), Himes et al.

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