Monitoring apparatus for processor controlled equipment

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371 16, G06F 1130

Patent

active

042414164

ABSTRACT:
A microprocessor monitor or analyzer used as a test and troubleshooting tool for both the software and hardware of microprocessor based equipment. The analyzer is usable with all microprocessor families having accessible or reconstructible address and data busses up to 16 bits wide each. It has search modes that find and identify the first and last instruction in a program loop. A transfer mode permits stepping forward or backward through programs without setting addresses. It can be used as a passive real time address and data bus monitor or as an interactive break point generator. After a match address is encountered, strobing and storing of the address and data bus content can be delayed by a preset number of machine cycles, instruction cycles, loop cycles (loop being the repetitive execution of the same instruction) or combinations of these delays. After a halt or break, the processor can be stepped in single or multiple step increments according to the above cycles. There is provision for the interconnection of several such analyzers if a wider address or data match and display or complex arming and strobing sequence is required.

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