Test method for detecting faulty memory cell of a programmable d

Details Test method for detecting faulty memory cell of a programmable d Test method for detecting faulty memory cell of a programmable d

1986-09-08

1989-08-29

Atkinson, Charles E.

Excavating

G01R 3128

Patent

active

048624594

ABSTRACT:
For testing unwritten-in field programmable memory cells, some specified written-in cells have been previously provided in the semiconductor device. In the first method, while a readout circuit, which reads datum written in the memory cell, is enabled, addressing-signals selecting the memory cell are switched from the written-in cell to a unwritten-in cell to be tested. Then, the voltage of the bit line operatively connected to the selected unwritten-in cell starts to rise gradually to that of the unwritten-in cell. The delay of this rising voltage, after the moment of the address-switching, is detected by the voltage level at a predetermined time, or by the time when this rising voltage reaches a predetermined threshold level. This delay corresponds to the degradation of the cell by leakage. In the second method, while the readout circuit is disabled, the addressing signals are switched from selecting written-in cell to selecting an unwritten-in cell to be tested, and then the readout circuit is enabled. The delay of the rising bit voltage is detected in the same way as those of the first method, but the time is measured from the moment at which the "enable" signal is applied. These delays can be also detected at the output terminal of the readout circuit.

REFERENCES:
patent: 4502131 (1985-02-01), Giebel
patent: 4504929 (1985-03-01), Takemae et al.
patent: 4612630 (1986-09-01), Rosier
patent: 4625311 (1986-11-01), Fitzpatrick et al.

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