Instantaneous phase detecting circuit and clock recovery signal

Details Instantaneous phase detecting circuit and clock recovery signal Instantaneous phase detecting circuit and clock recovery signal

1996-03-26

1997-09-16

Chin, Stephen

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

375330, H03D 100, H04L 2706

Patent

active

056688385

ABSTRACT:
An instantaneous phase detecting circuit for detecting the phase of a digital phase modulation wave signal which includes first and second logic circuits, first and second phase detecting circuits, and a third logic circuit. The first and second logic circuits receive the modulation wave signal, the first logic circuit receives a first carrier signal, and the second logic circuit receives a second carrier signal, the phase of the second carrier signal being delayed by a fixed period with respect to the phase of the first carrier signal. The first and second logic circuits generate first and second arithmetic outputs which are received by the first and second phase detecting circuits which detect the phases of the first and second arithmetic outputs to generate first and second detection output signals respectively. The third logic circuit receiving the first and second detection output signals and compares a periodic deviation of the first and second detection output signals to detect the phase of the modulation wave signal.

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Yoshikiko Akaiwa et al., "A Linea Modulation Scheme for Digital Mobile Radio Communications", 1985 IEEE, pp. 965-969.
Hiroshi Nobuta et al., ".pi. / 4-shift QPSK Differential Demodulator for Digital Cordless Telephone". 1992 Spring Meeting of Electronic Data Communication Society (with an English translation.

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