Method of forming a field plate in a high voltage array

Details Method of forming a field plate in a high voltage array Method of forming a field plate in a high voltage array

1985-11-15

1988-04-05

Hecker, Stuart N.

Static information storage and retrieval

Floating gate

Particular biasing

365 94, 365 53, 357 235, G11C 1134, G11C 800, G11C 1700

Patent

active

047363428

ABSTRACT:
An array of electrically programmable semiconductor memory cells of a type having electrically conducting odd and even row lines, left and right column and ground lines and field oxide regions separating adjacent left and right cells. The array has a field plate over the field oxide region which extends underneath both odd and even row lines. A driver is coupled to the odd and even row lines in order to drive one of them to substantially ground potential while the other is driven high to a cell selection voltage.

REFERENCES:
patent: 4185319 (1980-01-01), Stewart
patent: 4446536 (1984-05-01), Rodgers
patent: 4453234 (1984-06-01), Uehida
patent: 4507756 (1985-03-01), McElroy
patent: 4597060 (1986-06-01), Mitchell et al.
patent: 4608585 (1986-08-01), Keshtbod
patent: 4612629 (1986-09-01), Harari

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