Parallel register transfer mechanism for a reduction processor e

Details Parallel register transfer mechanism for a reduction processor e Parallel register transfer mechanism for a reduction processor e

1984-06-05

1987-03-31

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1300

Patent

active

046547800

ABSTRACT:
A parallel register-transfer mechanism has been disclosed above for use in the evaluation of expressions of a variable-free applicative language stored as binary directed graphs. The expression is reduced through a series of transformations until a result is obtained. A register file is provided with several crossbar networks interconnecting the various registers in the file for simultaneous transfer of their contents.

REFERENCES:
patent: 3710348 (1973-01-01), Craft

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