Patent
1986-08-06
1987-03-31
James, Andrew J.
357 67, 357 72, H01L 2328, H01L 2348
Patent
active
046546928
ABSTRACT:
Slits are formed in the metal wiring layer formed on the semiconductor of a semiconductor device to be resin sealed thereby to divide the total width of the metal wiring layer into divided widths each of the order of 30 to 40 .mu.m, whereby stress generated in the metal wiring layer is absorbed and prevented from causing cracking, deformation, and other defects. The slits are arranged to be substantially parallel to the peripheral side of the device which is most closely located to the wiring part.
REFERENCES:
patent: 3766448 (1973-10-01), Luce et al.
patent: 4438450 (1984-03-01), Sheng et al.
patent: 4467345 (1984-08-01), Ozawa
Hirata Seiichi
Sakurai Toshiharu
Clark S. V.
James Andrew J.
Kabushiki Kaisha Toshiba
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