Boots – shoes – and leggings
Patent
1992-05-05
1995-01-03
Black, Thomas G.
Boots, shoes, and leggings
364488, 364490, 364578, G06F 1560
Patent
active
053792327
ABSTRACT:
There is disclosed a logic simulator having a wiring load extraction function which is capable of accurately calculating characteristic data of wiring loads when wirings are shortly spaced. A wiring region dividing unit (1) and a wiring load model generator (3) convert a wiring layout data (D10) into a wiring load model circuit data (D12) including wiring load models respectively for divided wiring regions into which a wiring is divided as a function of the number of adjacent wirings. A wiring load distributed constant calculator (4) extracts characteristic parameters in accordance with the number of adjacent wirings of each of the wiring load models in the circuit data (D12) from a unit length wiring characteristic parameter group (D13) including different characteristic parameters in accordance with the number of adjacent wirings, to output a distributed constant circuit data (D14) including the characteristic data of the respective wiring load models as a function of the characteristic parameters and the wiring lengths of the respective wiring load models. This enables the characteristic data of the wiring loads to be calculated with high accuracy.
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patent: 5198986 (1993-03-01), Ikeda et al.
patent: 5210700 (1993-05-01), Tom
patent: 5218551 (1993-06-01), Agrawal et al.
patent: 5247455 (1993-09-01), Yoshikawa
Proceedings of the IEEE 1987 Custom Integrated Circuits Conference, May 4, 19887, pp. 137-141, Chang, et al., "Full-Chip RC Routing Extraction and Delay Analysis".
High Performance Systems, vol. 11, No. 5, May 1990, Richard Georing, "Asic Advances", 8 pages.
Black Thomas G.
Mitsubishi Denki & Kabushiki Kaisha
Walder, Jr. Stephen J.
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