Thin-film wiring layout for a non-planar thin-film structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

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257774, 257752, 257776, H01L 2350, H01L 2352

Patent

active

053789270

ABSTRACT:
A thin-film arrangement for a non-planar structure is described. The structure includes a substrate and a plurality of thin-film layers stacked on top of each other above the substrate. The layers contain conductive patterns and vias that provide connections between the conductive pattern in one of the layers to the conductive pattern in another layer. Vias that provide a connection between the conductive pattern of one layer to the conductive pattern in another remotely located layer are offset and in contact with respect to each other and are positioned in a non-linear arrangement, preferably in the form of a helix or a multiple helix.

REFERENCES:
patent: 4430365 (1984-02-01), Schaible et al.
patent: 4897708 (1990-01-01), Clements
patent: 5149674 (1992-09-01), Freeman et al.
patent: 5239448 (1993-08-01), Perkins et al.

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