Method and system for reducing transfer latency when transferrin

Details Method and system for reducing transfer latency when transferrin Method and system for reducing transfer latency when transferrin

1996-06-28

1998-06-09

Auve, Glenn A.

39520063, 39520065, 395280, 395282, 395872, G06F 1300

Patent

active

057648964

ABSTRACT:
A computer system for communicating with a network including a host processor, memory, an interface bus and a network interface device for reducing data transfer latency between the computer system and the network. The network interface device includes a buffer for temporarily storing data, a media interface device for transferring data between the buffer and the network, a bus interface for transferring data between the computer system's memory and the buffer, and a local processor for writing a unique value at a predetermined location within the buffer, for periodically comparing the data value at the predetermined location with the unique value and for initiating data transfer from the buffer to the computer's memory when the data value does not match the unique value. The network interface device is preferably a network interface card (NIC) for plugging into a slot of the interface or expansion bus of the computer system. The local processor writes the unique value at the location and then periodically compares the data at that location with the unique value. When the data value is different from the unique value, the local processor has detected new data in that block of memory. The local processor respondingly initiates data transfer of the new data from that block to the memory of the computer system.

REFERENCES:
patent: 5297139 (1994-03-01), Okura et al.
patent: 5307459 (1994-04-01), Petersen et al.
patent: 5434872 (1995-07-01), Petersen et al.
patent: 5606559 (1997-02-01), Badger et al.

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