Process for producing non-volatile memory devices having closely

Fishing – trapping – and vermin destroying

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437 45, 437 48, H01L 27112

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active

053786491

ABSTRACT:
This inventions provides a method to form metal lines with smaller line pitches than is possible using the conventional photolithographic single coating process. This invention provides for a double photolithographic process where the surface is coated, exposed and developed twice to form two sets of resist patterns. These resist patterns are used to form metal lines over all the buried bit lines. These metal lines provide better masking of the bit lines from the code implants thereby reducing bit line resistance and increasing ROM read speed.

REFERENCES:
patent: 4807021 (1989-02-01), Okumura
patent: 5149664 (1992-09-01), Shim et al.
patent: 5191405 (1993-03-01), Tomita et al.
patent: 5200355 (1993-04-01), Choi et al.
patent: 5202754 (1993-04-01), Bertin et al.

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