Method of making a bottom gate mask ROM device

Details Method of making a bottom gate mask ROM device Method of making a bottom gate mask ROM device

1993-10-25

1995-01-03

Thomas, Tom

Fishing, trapping, and vermin destroying

437 50, 437 52, H01L 27112

Patent

active

053786475

ABSTRACT:
The process comprises a sequence of steps initiated by forming a word line mask on the surface of a substrate of a first conductivity type. Ions are implanted to form word lines covered by a dielectric layer. A polysilicon layer doped with a given conductivity type on the dielectric layer is formed on a second dielectric layer on the polysilicon layer. Bit lines are formed with a different conductivity type in the polysilicon layer. Forming a code mask above the polysilicon layer with openings above predetermined regions, etched through the mask to remove predetermined regions in the first polysilicon layer, whereby the ROM is encoded. Preferably, a combined silicon dioxide and silicon nitride layer is formed above the polysilicon layer before forming the code mask. Preferably, the silicon dioxide is deposited first, patterned and used as a mask for forming dopant patterns in the polysilicon layer through openings therein. Preferably, a layer of silicon nitride is deposited upon the silicon dioxide to a greater thickness than the silicon dioxide and is then planarized. Preferably, the dielectric layer formed above the word lines comprises a gate oxide layer.

REFERENCES:
patent: 3914855 (1975-10-01), Cheney et al.
patent: 5002896 (1991-03-01), Naruke

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