Rendering processor

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G06F 1516

Patent

active

053718399

ABSTRACT:
A rendering processor having a plurality of DDA control circuits such that in each DDA circuit, the coordinates of source and destination images and gradation values are computed. Depending on the computation result, source and destination data to the raster arithmetic unit are generated so as to control the raster arithmetic unit, which enables a plurality of pixels to be generated and to be written in the memory during a memory access.

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