Semiconductor integrated circuit including test circuit

Details Semiconductor integrated circuit including test circuit Semiconductor integrated circuit including test circuit

1994-06-21

1997-03-25

Ramirez, Ellis B.

Excavating

371 226, 324765, 324523, G01R 3102

Patent

active

056152167

ABSTRACT:
A first test circuit is connected to one end of a first wiring line, and a second test circuit is connected to one end of a second wiring line. The second wiring line serves as a data bus. N-channel MOS transistors, connected in series, are provided between the first and second wiring lines and located below a third wiring line. The transistors are set in a conductive state by a gate control signal from a test control circuit in a test mode, and are set in an OFF state in a normal operation mode. In the normal operation mode, the capacitance between the first and second wiring lines is small and does not adversely affect the operation speed of an integrated circuit.

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