Semiconductor integrated circuit device having a test circuit

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371 222, 371 225, G01R 313177, G01R 313187

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057646546

ABSTRACT:
A semiconductor integrated circuit device having a test circuit for testing a plurality of gate cells arranged in a matrix; and connected to constitute a logic circuit. A plurality of row selection wires are provided along the gate cells in a row direction, each of the gate cells being operatively connected to a row selection wire, and a plurality of column read-out wires are provided along the gate cells in a column direction, outputs of each of the gate cells being operatively connected to column read-out wires. A row selection ring counter, operatively connected to the row selection wires, selects any of the row selection wires and any of the gate cells connected to the selected row selection wire so that a data selector and ring counter read the output of each gate cell arranged in the logic circuits through the column read-out wires.

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