Method of producing a connection hole for a DRAM having at least

Details Method of producing a connection hole for a DRAM having at least Method of producing a connection hole for a DRAM having at least

1992-05-20

1993-02-23

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 60, 437982, 437984, H01L 21266, H01L 2176

Patent

active

051889757

ABSTRACT:
In a semiconductor integrated circuit device having at least three conductor layers, a connection hole for the lower conductor layer and the upper conductor layer can be formed in self-alignment to the intermediate conductor layer after flattening the underlying insulation film for the upper conductor layer and deterioration of the insulation withstand voltage between the upper conductor layer and the intermediate conductor layer can be prevented.

REFERENCES:
patent: 5071781 (1991-12-01), Seo et al.
patent: 5110766 (1992-05-01), Maeda et al.
patent: 5116776 (1992-05-01), Chan et al.
patent: 5120674 (1992-06-01), Chin et al.

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