Method for powering down a microprocessor embedded within a gate

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307465, 395800, H03K 19177

Patent

active

053048601

ABSTRACT:
An interface circuit (14) that allows for a flexible three-way interface between a microprocessor (12), an ASIC cell block (16), and the external world has been provided wherein the microprocessor and the ASIC cell block are fabricated within a gate array (10). The interface circuit provides circuitry for each I/O pin (22, 23, 24) of the microprocessor to allow it to readily interface with the customer designed ASIC cell block or external devices via the ASIC I/O pads (20). The interface circuit also allows isolated testing of only the microprocessor, of only the ASIC cell block, or of both the microprocessor and the ASIC cell block. The interface circuit and the microprocessor are fully diffused and fixed-placed within the gate array while the ASIC cell block may be utilized by a customer to design a circuit to perform a customer defined function.

REFERENCES:
patent: 4634426 (1987-01-01), Karmen
patent: 4801820 (1989-01-01), Nootbaar
patent: 4906862 (1990-03-01), Itano et al.
patent: 4999519 (1991-03-01), Kitsukawa et al.
patent: 5111079 (1992-05-01), Steele
patent: 5187797 (1993-02-01), Nielsen et al.

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