Semiconductor memory device having a test circuit

Details Semiconductor memory device having a test circuit Semiconductor memory device having a test circuit

1995-02-27

1996-08-06

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365201, 371 211, G11C 800, G11C 2900

Patent

active

055441238

ABSTRACT:
A plurality of voltage supply circuits each including an inverter circuit are provided at the final stage of a row decoder. The voltage supply circuits are supplied with voltage Vdd and voltage Vxx. The voltage Vxx is set at a level of Vss in a normal operation mode and at a level higher than that of Vdd in a burn-in test mode. In the latter mode, the voltage Vdd is applied to the voltage supply circuit connected to a selected word line, while the voltage Vxx (higher than Vdd) is applied to the voltage supply circuit connected to a nonselected word line. All word lines are therefore set at a high level and rendered in a selective state.

REFERENCES:
patent: 5258954 (1993-11-01), Furuyama
patent: 5265057 (1993-11-01), Furuyama et al.
patent: 5287312 (1994-02-01), Okamura et al.
patent: 5303193 (1994-04-01), Ogihara

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