Digital computer register allocation and code spilling using int

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364DIG2, 3649640, 3649645, 3649642, 3649265, G06F 1208

Patent

active

052492958

ABSTRACT:
A method is disclosed for allocating internal machine registers in a digital computer for use in storing values defined and referenced by a computer program. An allocator in accordance with the present invention constructs a interference graph having a node therein for the live range of each value defined by a computer program, and having an edge between every two nodes whose associated live ranges interfere with each other. The allocator models the register allocation process as a graph-coloring problem, such that for a computer having R registers, the allocator of the present invention iteratively attempts to R-color the interference graph. The interference graph is colored to the extent possible on each iteration before a determination is made that one or more live ranges must be spilled. After spill code has been added to the program to transform spilled live ranges into multiple smaller live ranges, the allocator constructs a new interference graph and the process is repeated.

REFERENCES:
patent: 4571678 (1986-02-01), Chaitin
Preston Briggs, Keith D. Cooper, Ken Kennedy, and Linda Torczon, "Coloring Heuristics for Register Allocation", Proceedings of the SIGPLAN '89 Conference on Programming Language Design and Implementation, ACM Press, vol. 24, No. 7, Jul. 1989, pp. 275-284.
Preston Briggs, Keith D. Cooper, and Linda Torczon, "Coloring Register Pairs", ACM Letters on Programming Languages and Systems, ACM Press, vol. 1, No. 1, Mar. 1992, pp. 3-13.
Preston Briggs, "Register Allocation Via Graph Coloring--A Thesis Submitted in Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy", published by the Center for Research on Parallel Computation, CPRC-TR92218, Apr. 1992.

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