Semiconductor memory

Static information storage and retrieval – Addressing

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36518904, 365218, G11C 1134

Patent

active

052491595

ABSTRACT:
A semiconductor memory, such as, of a dual-port type includes RAM cells in which each RAM cell is coupled to one of a plurality of data lines and a word line. The memory is also associated with a plurality of sense amplifiers which are respectively coupled to a correspondingly associated data line, a plurality of switches respectively coupled between the plurality of data lines and a common data line for providing either a selective or simultaneous connection of the plurality of data lines to the common data line during a first write mode and a second write mode, respectively, a write circuit coupled between an external input/output terminal and the common data line which provides the first write signal having a first two-level signal range in accordance with the first write mode and a second write signal having a second two-level signal range in accordance with a second write mode. The memory also has a control circuit, such as a random access port column address decoder, which is responsive to column address signals for providing data line selecting signals for simultaneously turning ON each one of the plurality of switches during the normal operation of the memory or, alternatively, providing data line selecting signals for selectively turning ON a respective column switch during a normal operation thereof. The semiconductor memory is also additionally provided with a serial output circuit having a parallel-to-parallel circuit converter coupling the plurality of data lines therethrough to a serial input/output port external terminal.

REFERENCES:
patent: 4916669 (1990-04-01), Sato
patent: 5042013 (1991-08-01), Sato
Nikkei Electronics, Mar. 24, 1986, published by Nikkei McGraw-Hill Co.; Ltd., pp. 243-264. M. Ishihara et al., "Dual Port Memory For 256K Image with Serial Input Function and Raster Operation Function".

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