Fishing – trapping – and vermin destroying
Patent
1992-08-28
1993-09-28
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 31, 437 44, 437 45, 437 48, H01L 21265
Patent
active
052486265
ABSTRACT:
A method for fabricating a self-aligned, gate diffused junction field eff transistor is provided which includes the steps of forming an n-type layer on an indium phosphide, semi-insulating substrate; forming spaced apart source/drain metal contacts on the n-type layer; forming a metal gate on the n-type layer between the spaced apart source/drain contacts, where the metal gate is insulated from the source/drain contacts and includes a metallic p-type dopant material; and forming a p-type region in the n-type layer beneath the metal gate so that the gate contact and the p-type region have coincident boundaries with respect to each other at the surface of the n-type layer. The method may also be employed to manufacture a bipolar transistor by allowing the self-aligned and diffused p-type region to extend through the n-type layer to the semi-insulating substrate.
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Hewett Charles A.
Nguyen Richard
Fendelman Harvey
Hearn Brian E.
Kagan Michael A.
Keough Thomas Glenn
Picardat Kevin M.
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