Digital vertical sync signal separator

Details Digital vertical sync signal separator Digital vertical sync signal separator

1978-02-10

1980-07-22

Martin, John C.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

328112, 328139, 307234, H04N 510, H03K 520

Patent

active

042142709

ABSTRACT:
A signal detector circuit comprises a plurality of series-connected data latch circuits. An input signal and clock signals are applied to the first data latch circuit, the clock signals being effective to shift the input signal along the succeeding data latch circuits. The outputs of the data latch circuits are coupled to the plural inputs of a plurality of first logic circuits in a manner such that the outputs of different data latch circuits are combined at different ones of the first logic circuits. The outputs of the first logic circuits are combined in a second logic circuit which produces an output signal. The input signal may be a composite television synchronizing signal and the output signal may correspond to the vertical sync pluses in the composite synchronizing signal.

REFERENCES:
patent: 3551823 (1970-12-01), Stevens
patent: 3667054 (1972-05-01), Nelson

Affiliated with

Also associated with

Rating

Digital vertical sync signal separator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital vertical sync signal separator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital vertical sync signal separator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2180856