Interface adaptor having control register

Details Interface adaptor having control register Interface adaptor having control register

1974-10-30

1976-09-07

Ruggiero, Joseph F.

Communications: electrical

Digital comparator systems

G06F 300

Patent

active

039797309

ABSTRACT:
A peripheral interface adaptor (PIA) circuit for data processing systems contains memory elements or control registers allowing modification under program control of the logical functions of the PIA. The peripheral interface adaptor includes a plurality of data bus buffer circuits coupled to a bidirectional system data bus and further includes peripheral interface buffer circuits coupled to a bidirectional peripheral data bus. A direction of data flow at the peripheral interface data bus is controlled by a data direction register. Data from the data bus buffer is entered into an input register, and is transferred from there to an input bus coupled to a control register, the data direction register and a data register. Data from the peripheral data bus, the data direction register, and the control register are transferred via the output bus to the data bus buffers. Control signals are generated by select, read/write control, and register select logic which provides signals on a control bus coupled to the input register, the data register, and the data direction register to control data transfers between the various buses, registers, and buffer circuits.

REFERENCES:
patent: 3061192 (1962-10-01), Terzian
patent: 3331057 (1967-07-01), Hill
patent: 3470542 (1969-09-01), Trantanella
patent: 3585599 (1971-06-01), Hitt et al.
patent: 3602889 (1971-08-01), Gayman et al.
patent: 3753236 (1973-08-01), Flynn et al.
patent: 3757306 (1973-09-01), Boone
patent: 3771134 (1973-11-01), Huettner et al.
patent: 3821715 (1974-06-01), Hoff, Jr. et al.

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