Method and apparatus to test for current in an integrated circui

Details Method and apparatus to test for current in an integrated circui Method and apparatus to test for current in an integrated circui

Filed on

1991-04-02

Date issued

1994-12-06

Examiner

Nguyen, Vinh

Patent Class

Electricity: measuring and testing

SubClass

Measuring, testing, or sensing electricity, per se

SubSubClass

With rotor

Other Related Categories

324 731, G01R 2702

Type

Patent

Status

active

Patent number

053714571

Description

ABSTRACT:
Various methods and apparatus perform IDDQ testing using the input and output circuits typically associated with input and output pads of an integrated circuit. Under these methods, the number of tester channels and external circuit elements required for IDDQ measurements is minimized. In one embodiment, the IDDQ current is measured by sensing the voltage at either an input pad or an output pad. In another embodiment, an internal pull-up transistor of known resistance is used for current sensing. In another embodiment, a method and apparatus for performing IDDQ testing quickly are provided by disconnecting the primary power or ground bus line connections from the tester and using alternate connections to provide power to the circuit under test over the duration of the IDDQ testing.

REFERENCES:
patent: 4743841 (1988-05-01), Takeuchi
patent: 4801867 (1989-01-01), Suzuki
patent: 4853628 (1989-08-01), Gouldsberry et al.
patent: 4894605 (1990-01-01), Ringleb et al.
Jerry M. Soden et al., "Zero Defects or Zero Stuck-At Faults-CMOS IC Process Improvement with I.sub.DDQ," 1990 International Test Conference, pp. 255-256.
Steven McEuen, "Why IDDQ?", 1990 International Test Conference, p. 252.
Wojciech Maly et al., "Testing Oriented Analysis of CMOS ICs with Opens," pp. 344-347.
Mike Keating et al., "A New Approach to Dynamic IDD Testing," 1987 International Test Conference, pp. 316-320.

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