Field effect transistors

Details Field effect transistors Field effect transistors

1994-01-03

1994-12-06

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

257194, 257280, H01L 3300, H01L 2310

Patent

active

053713877

ABSTRACT:
A field effect transistor includes a buffer layer, an undoped channel layer, and a N-type electron supplying layer which are sequentially deposited on a semi-insulating semiconductor substrate. The undoped channel layer is formed of an In.sub.x Ga.sub.1-x As layer. The In composition ratio in the InGaAs layer varies gradually in the direction of the thickness and has a maximum value at the position spaced away from the interface of the N-type electron supplying layer of the InGaAs layer by 40 .ANG. or more but less than 110 .ANG..

REFERENCES:
patent: 4740822 (1988-04-01), Itoh
patent: 4748484 (1988-05-01), Takakuwa et al.
patent: 5032893 (1991-07-01), Fitzgerald
Microwave Performance of a Quarter-Micrometer Gate Low-Noise Pseudomorphic InGaAs/AlGa/As Modulation-Doped Field Effect Transistor, IEEE Electron Device Letters, vol. EDL-7, No. 12, Dec. 1986, pp. 649-651, by T. Henderson, et al.
Electron Energy Levels in GaAs-Ga.sub.1-x Al.sub.x As Heterojunctions, Physical Review B, vol. 30, No. 2, pp. 840-848, by Frank Stern, et al. (Jul., 1984).

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