Boots – shoes – and leggings
Patent
1989-02-28
1993-03-09
Lee, Thomas C.
Boots, shoes, and leggings
395375, 364DIG1, 3642318, 3642613, 3642624, 3642614, G06F 938, G06F 940, G06F 942
Patent
active
051932059
ABSTRACT:
A data processor in accordance with the present invention makes it possible to perform pre-branch processing with respect to a return address in the initial stage of pipeline processing also on a subroutine return instruction, and therefore by providing a stack memory (PC stack) dedicated to a program counter (PC) for storing only return addresses of the subroutine return instruction, in executing a subroutine call instruction in an execution stage of a pipeline processing mechanism, the return address from the subroutine is pushed to the PC stack, and the pre-branch processing is performed to the address popped from the PC stack in decoding the subroutine return instruction in an instruction decoding stage.
REFERENCES:
patent: 4315313 (1982-02-01), Armstrong
patent: 4394729 (1983-07-01), Armstrong
patent: 4399507 (1983-08-01), Cosgrove et al.
patent: 4546431 (1985-10-01), Horvath
patent: 4907147 (1990-11-01), Saito
patent: 4974158 (1990-03-01), Watanabe et al.
"Branch Prediction Strategies and Branch Target Buffer Design," Lee, et al., Computer, vol. 17, No. 1, Jan. 1984.
Matsuo Masahito
Yoshida Toyohiko
Donaghue L.
Lee Thomas C.
Mitsubishi Denki & Kabushiki Kaisha
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