Housing and lead structure for a series connected semiconductor

Details Housing and lead structure for a series connected semiconductor Housing and lead structure for a series connected semiconductor

1976-04-16

1977-09-06

James, Andrew J.

357 72, 357 75, 357 80, H01L 2302, H01L 2328, H01L 2316, H01L 3902

Patent

active

040471977

ABSTRACT:
A semiconductor rectifier arrangement in which two semiconductor rectifier evices which each have at least one pn junction are fastened with their connecting components to one side of a common metallic base plate in an electrically isolated but thermally conducting manner, are connected into an electrical series circuit to form a structural unit and are disposed in a housing. In addition to the two current conducting terminals associated with the input and output of the series circuit, a third current conducting terminal is provided which is connected with the conductor connecting the two semiconductor rectifier wafers in series. The three current conducting terminals are arranged in a row with the third terminal associated with the connecting conductor preferably being disposed at one end of the row. Each one of the two outer current conducting terminals and its associated semiconductor rectifier device is fastened and electrically conductively connected to a respective one of a pair of contacting layers which are spaced from one another and are permanently affixed to the base plate via an intermediate disc of electrical insulating material.

REFERENCES:
patent: 3483444 (1969-12-01), Parrish
patent: 3519888 (1970-07-01), Parrish
patent: 3644797 (1972-02-01), Carter
patent: 3648121 (1972-03-01), Suenaga et al.
patent: 3784725 (1974-01-01), Perkins et al.

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