Circuitry for calculating magnitude of vector sum from its ortho

Details Circuitry for calculating magnitude of vector sum from its ortho Circuitry for calculating magnitude of vector sum from its ortho

1984-09-28

1987-09-08

Williams, Jr., Archie E.

Boots, shoes, and leggings

358 23, 358 27, 358 28, 364715, G06F 7556

Patent

active

046928898

ABSTRACT:
An arrangement is provided for computing the magnitude value of the vector sum of two quadrature-related component signals I and Q with a minimal of hardware. To this end, the magnitude values of the orthogonal I and Q signals are applied to a ROM as address codes to produce the Log.sub.B .vertline.I.vertline. and Log.sub.B .vertline.Q.vertline. values to the logarithmic base B. The smaller of the Log.sub.B .vertline.I.vertline. and Log.sub.B .vertline.Q.vertline. logarithmic values is subtracted from the larger of the logarithmic values to produce the absolute value .vertline.D.vertline. of the difference between the respective logarithmic values. The difference value D is applied to a ROM as an address code which is programmed to generate a correction value F=0.5 Log.sub.B (1+B.sup.-2.vertline.D.vertline.). The correction value F is added to the larger of the two logarithmic values, and the antilog of the sum is computed to determine the magnitude value C of the vector sum of the two quadrature signals I and Q.

REFERENCES:
patent: 4523221 (1985-06-01), Chin et al.
patent: 4528586 (1985-07-01), Lewis, Jr. et al.
patent: 4544944 (1985-10-01), Chin
patent: 4562460 (1985-12-01), Harwood
patent: 4587552 (1986-05-01), Chin
patent: 4599701 (1986-07-01), Vojir et al.

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