Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Patent
1996-02-06
1997-06-17
Saadat, Mahshid D.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
257633, 257706, 257747, H01L 2306, H01L 2315
Patent
active
056400454
ABSTRACT:
A packaging system for minimizing thermal-induced stress in a high power semiconductor device. The system is comprised of an electrically insulating, thermally conductive substrate having planar upper and lower surfaces, a semiconductor die having a planar lower heat extraction surface attached to said upper surface of said substrate, and electrically insulating thermal compound disposed between and in contact with the said lower heat extraction surface of said substrate and the system heat extraction upper surface. .DELTA.L.varies..DELTA.S is defined in Equation 12, wherein T.sub.B is the temperature at said outer edge of the lower heat extraction surface of said die, T.sub.D is the temperature at said outer edge of the lower surface of said substrate, and PPM is part per million.
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Arroyo Teresa M.
Directed Energy, Inc.
Edmundson Dean P.
Saadat Mahshid D.
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