Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1978-05-26
1981-07-14
Rutledge, L. Dewayne
Metal working
Method of mechanical manufacture
Assembling or joining
29577C, 29578, 148187, 156653, 156657, 357 41, 357 45, 357 54, 357 59, H01L 21225, H01L 2978
Patent
active
042778816
ABSTRACT:
A process for producing VLSI (very large scale integrated) circuits employs techniques of self-aligned gates and contacts for FET devices and for both diffused conducting lines in the substrate and polysilicon conducting lines situated on isolating field oxide formed on the substrate. Mask alignment tolerances are increased and rendered non-critical. The use of materials in successive layers having different etch characteristics permits selective oxidation of desired portions only of the structure without need for masking and removal of selected material from desired locations by batch removal processes again without use of masking. There results VLSI circuits having increased density and reliability.
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patent: 3942241 (1976-03-01), Harigaya et al.
patent: 3943542 (1976-03-01), Ho et al.
patent: 4021789 (1977-05-01), Furman
patent: 4057820 (1977-11-01), Gallager
patent: 4139402 (1979-02-01), Steinmaier
patent: 4151537 (1979-04-01), Goldman
Hamann H. Fredrick
Rockwell International Corporation
Rutledge L. Dewayne
Saba W. G.
Staas Harry John
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