Trenched DMOS transistor fabrication having thick termination re

Details Trenched DMOS transistor fabrication having thick termination re Trenched DMOS transistor fabrication having thick termination re

1996-02-16

1997-06-17

Niebling, John

Fishing, trapping, and vermin destroying

437 40RG, 437 40DM, 437 41RG, 437203, H01L 21265, H01L 2144, H01L 2148

Patent

active

056396767

ABSTRACT:
A trenched DMOS transistor is fabricated using seven masking steps. One masking step defines both the P+ deep body regions and the active portions of the transistor which are masked using a LOCOS process. A second masking step defines the insulating oxide in the termination region. The insulating (oxide) layer in the termination region is thus thicker than in the active region of the transistor, thereby improving process control and reducing substrate contamination during processing. Additionally, the thicker field oxide in the termination region improves electric field distribution so that avalanche breakdown occurs in the cell (active) region rather than in the termination region, and thus breakdown voltage behavior is more stable and predictable.

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