Semiconductor integrated circuit of standard cell system

Details Semiconductor integrated circuit of standard cell system Semiconductor integrated circuit of standard cell system

1991-09-26

1993-02-16

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

257208, 257210, 257390, 257206, H01L 2702

Patent

active

051875551

ABSTRACT:
Transistor elements which are not initially wired are previously arranged in no-cell regions created in part of cell array regions in a standard cell layout according to the layout design. When the circuit is changed in the standard cell layout, a desired circuit is formed in the no-cell region by using the transistor elements which are not initially wired. After the circuit change, an unnecessary circuit is made inoperative. Wiring inhibition regions for inhibiting the normal wiring in the standard cell layout are provided in order to extend the input and output terminals of the desired circuit from the no-cell region to the wiring region.

REFERENCES:
patent: 4623911 (1986-11-01), Pryor
patent: 4910574 (1990-03-01), Aipperspach et al.
patent: 4947229 (1990-08-01), Tanaka et al.
patent: 5063430 (1991-11-01), Mori
patent: 5095356 (1992-03-01), Ando et al.

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