Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
Patent
1996-12-30
1999-11-02
Kim, Kenneth S.
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
711208, 712217, 712 23, G06F 934
Patent
active
059789000
ABSTRACT:
A microprocessor capable of renaming a numeric register and a segment register includes a plurality of general registers and a data dependency unit. The data dependency unit is configured to receive instructions to be executed, wherein the instructions include accessing the numeric register and accessing the segment register. The data dependency unit renames the numeric register as one of the plurality of general registers for each of the instructions accessing said numeric register, renames the segment register as one of the plurality of general registers for each of the instructions accessing the segment register, and generates a dependency vector for each of the instructions. The microprocessor may include a scheduler configured to receive the instructions and dependency vector and schedule the instructions for execution based on the dependency vector, and an execution engine adapted to receive the instructions from the scheduler and execute the instructions.
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Hammond Gary
Liu Kin-Yip
Pai Anand
Shoemaker Kenneth
Intel Corporation
Kim Kenneth S.
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