Method of making SRAM cell and structure with polycrystalline P-

Details Method of making SRAM cell and structure with polycrystalline P- Method of making SRAM cell and structure with polycrystalline P-

1991-06-03

1993-02-16

Thomas, Tom

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 57, 437 60, 437200, 437918, H01L 2170

Patent

active

051871149

ABSTRACT:
A method for forming a SRAM structure with polycrystalline P-channel load devices of an integrated circuit, and an integrated circuit formed according to the same, is disclosed. A first gate electrode of a first N-channel field effect device is formed over the substrate having a source/drain region in the substrate. A second gate electrode of a second N-channel field effect device is also formed over the substrate and a portion of a field oxide. A metal containing layer is formed over the second gate electrode and the source/drain region of the first N-channel device to define a shared contact region. A first conductive layer is formed over the metal containing layer, patterned and etched to define a first and a second gate electrode of a first and a second P-channel field effect device respectively. A second conductive layer is formed over a portion of the first and second P-channel devices, to define a source/drain and channel region of the P-channel devices.

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Ikeda et al.; A Polysilicon Transistor Technology for Large Capacity SRAMs; Apr. 1990 in IEEE--IEDM 90-469 pp. 18. 1.1-4.
U.S. application Ser. No. 516,272 Apr. 1990, Brady et al.
U.S. application Ser. No. 531,014 May 1990, Chan et al.

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