Patent
1992-09-02
1995-05-23
Nguyen, Phu K.
G06F 314
Patent
active
054189071
ABSTRACT:
A multi-port memory with a memory array having a plurality of memory cells arranged in a matrix fashion. The memory array includes first signal lines for selecting rows of the plurality of memory cells. The memory array further includes second signal lines for selecting columns of the plurality of memory cells. The multi-port memory further includes a first decoder for generating select signals for selecting the first signal lines. The multi-port memory further includes a plurality of input or output ports connected to the second signal lines. The multi-port memory further includes a second decoder for use in common for the plurality of input/output ports and for generating select signals for selecting the second signal lines, wherein the select signals for selecting second signal lines to connect to the plurality of input/output ports the second signal lines are shifted one by one, respectively. The multi-port memory may be used with an interpolation circuit in a digital interpolation apparatus.
REFERENCES:
patent: 4931954 (1990-06-01), Honda et al.
Nguyen Phu K.
Sammut Charles P.
Sony Corporation
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