Multiplier circuit and division circuit with a round-off functio

Details Multiplier circuit and division circuit with a round-off functio Multiplier circuit and division circuit with a round-off functio

1994-03-15

1995-08-22

Mai, Tan V.

Boots, shoes, and leggings

G06F 752

Patent

active

054446473

ABSTRACT:
A multiplier circuit has a smaller circuit size and operates at a higher speed. An addition processing part (31b) to which a partial product group 6 is inputted includes at its first stage half adders (7a) and (7c) and a rounding half adder (13). The addition processing part (31b) further includes full adders (8a), (8b) and (8c) at its second stage, full adders (8d), (8e) and (8f) at its third stage, and a 3-bit carry look ahead adder (9) at its fourth stage. A value outputted from the rounding half adder 13 is a sum of two inputs given thereto and a value 1. A rounding circuit for calculating a round number is therefore not necessary.

REFERENCES:
patent: 3803393 (1974-04-01), Wang
patent: 4599702 (1986-07-01), Tokumitsu
patent: 5007009 (1991-04-01), Azetsu

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